Publications

Hans Werner Lang

 aufwärts

[1]H.W. Lang, M. Schimmler, H. Schmeck, H. Schröder: A Fast Sorting Algorithm for VLSI. Proc. 10th ICALP, Barcelona, Lecture Notes in Computer Science 154, Springer-Verlag, 408-419 (1983)
[2]H.W. Lang, M. Schimmler, H. Schmeck, H. Schröder: Systolic Sorting on a Mesh-Connected Network. IEEE Transactions on Computers C 34, 7, 652-658 (1985)
[3]H.W. Lang: Verfahren zum Betreiben eines hochintegrierten Wellenfront-Feldrechners sowie entsprechender Wellenfront-Feldrechner. Patent Nr. DE 3533800 C1, Federal Republic of Germany (1985)
[4]H.W. Lang: The Instruction Systolic Array, a Parallel Architecture for VLSI. Integration, the VLSI Journal 4, 65-74 (1986)
[5]H.W. Lang: ISA and SISA: Two Variants of a General Purpose Systolic Array Architecture. In: L.P. and S.I. Kartashev (eds.): Proc. Second Int. Conf. on Supercomputing, Vol. 1, 460-465 (1987)
[6]M. Kunde, H.W. Lang, M. Schimmler, H. Schmeck, H. Schröder: The Instruction Systolic Array and its Relation to Other Models of Parallel Computers. Parallel Computing 7, 25-39 (1988)
[7]H.W. Lang: Transitive Closure on the Instruction Systolic Array. In: K. Bromley, S.Y. Kung, E. Swartzlander (eds.): Proceedings of the Int. Conf. on Systolic Arrays, San Diego, Computer Society Press, Washington D.C., 295-304 (1988) HTML Reprint
[8]H.W. Lang: Wavefront Array Processor. US Patent Nr. 4,884,193 (1989)
[9]H.W. Lang: Das befehlssystolische Prozessorfeld - Architektur und Programmierung. Dissertation. Christian-Albrechts-Universität Kiel (1990)
[10]H.W. Lang: Design of a bit-serial multiplier. Report ISATEC GmbH, Kiel (1993) HTML Reprint
[11]H.W. Lang, R. Maaß, M. Schimmler: Implementation of a 1024-Processor Array Computer as an Add-On Board for Personal Computers. In: W. Gentzsch, U. Harms (eds.): High Performance Computing and Networking, Lecture Notes in Computer Science 797, Springer-Verlag, 487-488 (1994)
[12]M. Schimmler, H.W. Lang: The Instruction Systolic Array in Image Processing Applications. In: O. Loffeld (ed.): Vision Systems: Sensors, Sensor Systems and Components, Proc. SPIE Vol. 2784, 136-144 (1996)
[13]H.W. Lang: Algorithmen in Java. ISBN 3-486-25900-8, Oldenbourg (2002)
[14]M. Schimmler, B. Schmidt, H.W. Lang, S. Heithecker: An Area-Efficient Bit-Serial Integer Multiplier. In: H.R. Arabnia, L.T. Yang (eds.): Proceedings of the International Conference on VLSI, CSREA Press, 131-137 (2003)
[15]M. Schimmler, B. Schmidt, H.W. Lang: Design of a Bit-Serial Floating Point Unit for a Fine Grained Parallel Processor Array. In: H.R. Arabnia, L.T. Yang (eds.): Proceedings of the 2003 International Conference on Parallel and Distributed Processing Techniques and Applications, CSREA Press, 255-261 (2003)
[16]M. Schimmler, B. Schmidt, H.W. Lang: A Bit-Serial Floating Point Unit for a Massively Parallel System on a Chip. Parallel Algorithms and Applications, 19, 2-3, 79-96 (2004)
[17]H.W. Lang: Algorithmen in Java. 2nd edition, ISBN 978-3-486-57938-3, Oldenbourg (2006)
[18]M. Schimmler, B. Schmidt, H.W. Lang, S. Heithecker: An Area-Efficient Bit-Serial Integer and GF(2n) Multiplier. Microelectronic Engineering, 84, 2, 253-259 (2007) doi:10.1016/j.mee.2006.02.009
[19]H.W. Lang: A Characterization of the Chomsky Hierarchy by String Turing Machines. In: H.R. Arabnia, G.A. Gravvanis, A.M.G. Solo (eds.): Proceedings of the 2010 International Conference on Foundations of Computer Science, CSREA Press, 109-114 (2010)
[20]H.W. Lang: Algorithmen in Java. 3rd edition, ISBN 978-3-486-71406-7, Oldenbourg (2012)

 

 

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